Design of a 10Gb/s Tunable Voltage-Mode Transmitter Driver with 3-Tap FFE in 65nm CMOS
Date:
- Measured a pulse response on a channel model and calculated the tap weights based on zero-forcing method in MATLAB.
- Designed a 5-bit voltage-mode transmitter driver with rigorous sizing for impedance matching under DC simulation.
- Adopted foot transistors and introduced enable signal to realize the function of tunable weights under different data rates.
- Conducted comparisons with current-mode driver and tested the tunability control using pass gate.